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FEATURES
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LTC3603 2.5A, 15V Monolithic Synchronous Step-Down Regulator DESCRIPTION
The LTC(R)3603 is a high efficiency, monolithic synchronous step-down DC/DC converter utilizing a constant-frequency, current mode architecture. It operates from an input voltage range of 4.5V to 15V and provides an adjustable regulated output voltage from 0.6V to 14.5V while delivering up to 2.5A of output current. The internal synchronous power switch with 45m on-resistance increases efficiency and eliminates the need for an external Schottky diode. The switching frequency can either be set by an external resistor or synchronized to an external clock. OPTI-LOOP(R) compensation allows the transient response to be optimized over a wide range of loads and output capacitors. The LTC3603 can be configured for either Burst Mode operation or forced continuous operation. Forced continuous operation reduces noise and RF interference, while Burst Mode operation provides the highest efficiency at light loads. In Burst Mode operation, external control of the burst clamp level allows the output voltage ripple to be adjusted according to the requirements of the application.
L, LT, LTC, LTM, Burst Mode, OPTI-LOOP Linear Technology and the Linear logo are registered , trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 6580258, 6498466, 6611131, 6177787, 5705919, 5847554.
Wide Input Voltage Range: 4.5V to 15V 2.5A Output Current Low RDS(ON) Internal Switches: 45m and 85m Programmable Frequency: 300kHz to 3MHz Low Quiescent Current: 75A 0.6V 1% Reference Allows Precise, Low Output Voltage 99% Maximum Duty Cycle Adjustable Burst Mode(R) Clamp Synchronizable to External Clock Power Good Output Voltage Monitor Overtemperature Protection Overvoltage Protection Available in 16-Lead Thermally Enhanced MSOP and 4mm x 4mm QFN Packages
APPLICATIONS
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Point-of-Load Supplies Portable Instruments Communications Infrastructure
TYPICAL APPLICATION
3.3V, 2.5A, 1MHz Step-Down Regulator
VIN 4.5V TO 15V 22F PVIN INTVCC RUN RT 105k 4.32k ITH 1nF PGND 475k 10pF
3603 TA01
Efficiency and Power Loss vs Load Current
100 95 VIN = 12V EFFICIENCY 1000 POWER LOSS (mW) 10000
1F 90 EFFICIENCY (%) 0.22F 2.2H SW 85 80 75 BOOST LTC3603 VOUT 3.3V 100F 2.5A
100 POWER LOSS
PGOOD TRACK/SS
70 65 60 0.001 0.01 0.1 1 LOAD CURRENT (A)
10
SYNC/MODE VFB
105k
1 10
3603 TA01b
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LTC3603 ABSOLUTE MAXIMUM RATINGS
(Note 1)
PVIN Supply Voltage (DC) .......................... -0.3V to 16V PVIN Supply Transient Voltage (<1s) .......................21V SW .............................................. -0.3V to (PVIN + 0.3V) BOOST .................................(VSW -0.3V) to (VSW + 6V) RUN ........................................................... -0.3V to 16V All Other Pins ............................................... -0.3V to 6V
Peak SW Sink and Source Current (Note 7) .............6.5A Operating Junction Temperature Range (Notes 2, 5, 6) LTC3603E ............................................-40C to 85C LTC3603I ........................................... -40C to 125C Lead Temperature (Soldering, 10 seconds) MSE Package .................................................... 300C
PIN CONFIGURATION
BOOST TOP VIEW SW SW SW SW 15 PGND 14 PGND 21 SGND 13 PGND 12 PGND 11 TRACK/SS 6 RT 7 ITH 8 VFB 9 10 SGND RUN 20 19 18 17 16 TOP VIEW INTVCC SYNC/MODE PGOOD RT ITH VFB SGND RUN 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 PVIN PVIN BOOST SW SW PGND PGND TRACK/SS PVIN 1 PVIN 2 INTVCC 3 SYNC/MODE 4 PGOOD 5
17 SGND
MSE PACKAGE 16-LEAD PLASTIC MSOP TJMAX = 125C, JA = 45C/W, JC = 10C/W EXPOSED PAD (PIN 17) IS SGND, MUST BE SOLDERED TO PCB
UF PACKAGE 20-LEAD (4mm 4mm) PLASTIC QFN TJMAX = 125C, JA = 37C/W, JC = 5C/W EXPOSED PAD (PIN 21) IS SGND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3603EMSE#PBF LTC3603EMSE#TRPBF 3603 16-Lead Plastic MSOP -40C to 85C LTC3603IMSE #PBF LTC3603IMSE#TRPBF 3603 16-Lead Plastic MSOP -40C to 125C LTC3603EUF#PBF LTC3603EUF#TRPBF 3603 -40C to 85C 20-Lead (4mm x 4mm) Plastic QFN LTC3603IUF#PBF LTC3603IUF#TRPBF 3603 -40C to 125C 20-Lead (4mm x 4mm) Plastic QFN Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
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LTC3603 ELECTRICAL CHARACTERISTICS
SYMBOL PVIN VFB VFB(LINEREG) VFB(LOADREG) VPGOOD RPGOOD IFB gm IS PARAMETER Operating Voltage Range Regulated Feedback Voltage Feedback Voltage Line Regulation Feedback Voltage Load Regulation Power Good Range Power Good Resistance FB Input Bias Current Transconductance Amplifier gm Supply Current Active Mode Sleep Mode Shutdown VCC LDO Output Voltage Minimum Controllable ON-Time RUN Pin ON Threshold TRACK/SS Pull-Up Current Oscillator Frequency SYNC Capture Range Top Switch On-Resistance Bottom Switch On-Resistance Peak Current Limit Switch Leakage Current INTVCC Undervoltage Lockout INTVCC Undervoltage Lockout Hysteresis
The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25C. VIN = 12V unless otherwise specified.
CONDITIONS ITH = 0.7V (Note 3) VIN = 5V to 15V, ITH = 0.7V ITH = 0.36V to 0.84V
l l
MIN 4.5 0.594
TYP 0.6 0.005 0.02 10 55 10 1.7
MAX 15 0.606 0.1 12 80
UNITS V V %/V % % nA mS A A A V ns V A MHz MHz m m A A V mV
(Note 4) 500 75 0.2 4.9 95 0.7 1.25 1 85 45 3.8 INTVCC Ramping Up
l
INTVCC tON, MIN VRUN ITRACK/SS fOSC fSYNC RDS(ON) ILIM ILSW VUVLO VUVLO, HYS
4.7 VRUN Rising TRACK/SS = 1V RT = 105k
l
0.4 0.85 0.3
700 100 1 5.1 115 1 1.15 3
4.1
4.5 0.1 4.2 700
5.2 1 4.3
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3603E is guaranteed to meet performance specifications from 0C to 85C. Specifications over the -40C to 85C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3603I is guaranteed over the -40C to 125C operating junction temperature range. Note 3: The LTC3603 is tested in a feedback loop that adjusts VFB to achieve a specified error amplifier output voltage (ITH).
Note 4: Dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. Note 5: TJ is calculated from the ambient temperature TA and the power dissipation as follows: TJ = TA + (PD)(JAC/W). Note 6: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 7: This limit indicates the current density limitations of the internal metallization and it is not tested in production.
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LTC3603 TYPICAL PERFORMANCE CHARACTERISTICS
Burst Mode Operation Load Step Transient Forced Continuous
OUTPUT VOLTAGE 50mV/DIV INDUCTOR CURRENT 500mA/DIV VIN = 12V VOUT = 3.3V LOAD = 50mA 10s/DIV
3603 G01
OUTPUT VOLTAGE 100mV/DIV LOAD CURRENT 1A/DIV VIN = 12V VOUT = 3.3V 10s/DIV
3603 G02
VREF vs Temperature
0.6006 0.6004 RESISTANCE (m) 0.6002 VREF (V) 0.6000 0.5998 0.5996 0.5994 -50 -25 VIN = 12V 90 85 80 75 70 65 60 55 50 45 50 25 75 0 TEMPERATURE (C) 100 125 40
Switch On-Resistance vs Input Voltage
VBOOST - VSW = INTVCC TOP RESISTANCE (m) 120 100
Switch On-Resistance vs Temperature
VIN = 12V
TOP 80 60 BOTTOM 40 20
BOTTOM 4 5 6 7 8 9 10 11 12 13 14 15 INPUT VOLTAGE (V)
3603 G04
0 -50 -25
50 25 75 0 TEMPERATURE (C)
100
125
3603 G03
3603 G05
PVIN Leakage Current vs Input Voltage
50 45 40 INPUT CURRENT (nA) FREQUENCY (kHz) VRUN = 0V 3500 3000
Frequency vs ROSC
1040 1030 1020 FREQUENCY (kHz) 1010 1000 990 980 970 960 0 50 100 150 200 250 ROSC (k) 300 350
Frequency vs Input Voltage
ROSC = 105k
35 30 25 20 15 10 5 0
2500 2000 1500 1000 500 0
4
5
6
7
8 9 10 11 12 13 14 15 INPUT VOLTAGE (V)
3603 G06
4
5
6
7 8 9 10 11 12 13 14 15 INPUT VOLTAGE (V)
3603 G08
3603 G07
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LTC3603 TYPICAL PERFORMANCE CHARACTERISTICS
Frequency vs Temperature
1020 1015 1010 FREQUENCY (kHz) 1005 QUIESCENT CURRENT (A) ROSC = 105k 600 500 400 300 200 100 0 4 5 6 7 8 9 10 11 12 13 14 15 INPUT VOLTAGE (V)
3603 G10
Quiescent Current vs Input Voltage
600 ACTIVE QUIESCENT CURRENT (A) 500 400 300 200 100
Quiescent Current vs Temperature
ACTIVE
1000 995 990 985 980 -50 -25 0 25 50 75 100 125
SLEEP
SLEEP
0 -50 -25
TEMPERATURE (C)
3603 G09
50 25 75 0 TEMPERATURE (C)
100
125
3603 G11
Minimum Peak Inductor Current vs Burst Clamp Voltage
3.0 2.5 2.0 1.5 1.0 0.5 0 0.4 5
Maximum Peak Inductor Current vs Duty Cycle
100 95 90
Efficiency vs Load Current, Burst Mode Operation
FIGURE 6 CIRCUIT VIN = 5V VIN = 7.2V
PEAK INDUCTOR CURRENT (A)
PEAK INDUCTOR CURRENT (A)
4 EFFICIENCY (%)
3
VIN = 15V 85 80 75 70 0.001 VIN = 12V
2
1
0.5 0.6 0.7 0.8 0.9 BURST CLAMP VOLTAGE (V)
1.0
3603 G12
0
0
10 20 30 40 50 60 70 80 90 100 DUTY CYCLE (%)
3603 G13
0.1 1 0.01 LOAD CURRENT (A)
10
3603 G14
Efficiency vs Load Current, Forced Continuous
100 90 80 EFFICIENCY (%) VIN = 12V 70 VIN = 7.2V 60 50 40 30 0.01 EFFICIENCY (%) FIGURE 6 CIRCUIT VIN = 5V VIN = 15V 100 95 90 85 80 75 70 0.1 1 LOAD CURRENT (A) 10
3603 G15
Efficiency vs Input Voltage
FIGURE 6 CIRCUIT ILOAD = 1A EFFICIENCY (%) 100 98 96 ILOAD = 2.5A 94
Efficiency vs Frequency
FIGURE 6 CIRCUIT ILOAD = 2A
VIN = 7.2V 92 90 88 86 VIN = 12V
4
5
6
7
8 9 10 11 12 13 14 15 16 INPUT VOLTAGE (V)
3603 G16
84
0
1000
2000
3000
3603 G17
FREQUENCY (kHz)
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LTC3603 TYPICAL PERFORMANCE CHARACTERISTICS
Load Regulation
0.10 5.10 FIGURE 6 CIRCUIT VIN = 12V LDO OUTPUT VOLTAGE (V) 5.08 TRACK/SS CURRENT (A) 5.06 5.04 5.02 5.00 4.98 4.96 4.94 4.92 -0.20 0 0.5 1 1.5 2 LOAD CURRENT (A) 2.5 3
3603 G18
5V LDO Output Voltage vs Temperature
1.40 1.35 1.30 1.25 1.20 1.15
TRACK/SS Current vs Temperature
VOUT/VOUT (%)
0
-0.10
4.90 -50
-25
50 25 0 75 TEMPERATURE (C)
100
125
1.10 -50 -25
50 25 75 0 TEMPERATURE (C)
100
125
3603 G19
3603 G20
PIN FUNCTIONS
MSE/UF Package
INTVCC (Pin 1/Pin 3): Output of Internal 5V LDO. SYNC/MODE (Pin 2/Pin 4): Mode Select and External Clock Synchronization Input. PGOOD (Pin 3/Pin 5): Power Good Output. Open-drain logic output that is pulled to ground when the output voltage is not within 10% of regulation point. RT (Pin 4/Pin 6): Frequency Set Pin. ITH (Pin 5/Pin 7): Error Amplifier Compensation Point. VFB (Pin 6/Pin 8): Feedback Pin. SGND (Pin 7, Exposed Pad Pin 17/Pin 9, Exposed Pad Pin 21): Signal Ground. Exposed pad is signal ground and must be soldered to the PCB for rated thermal performance. RUN (Pin 8/Pin 10): Run Control Input. This pin may be tied to PVIN to enable the chip.
TRACK/SS (Pin 9/Pin 11): Tracking Input for the Controller or Optional External Soft-Start Input. This pin allows the start-up of VOUT to "track" the external voltage at this pin using an external resistor divider. An external soft-start can be programmed by connecting a capacitor between this pin and ground. Leave this pin floating to use the internal 1ms soft-start clamp. Do not tie this pin to INTVCC or to PVIN. PGND (Pins 10, 11/Pins 12, 13, 14, 15): Power Ground. SW (Pins 12, 13/Pins 16, 17, 18, 19): Switch Node Connection to the Inductor. BOOST (Pin 14/Pin 20): Bootstrapped Supply to the Top Side Floating Gate Driver. PVIN (Pins 15, 16/Pins 1,2): Power Input Supply. Decouple this pin with a capacitor to PGND
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LTC3603 BLOCK DIAGRAM
ITH 1.2A 0.6V VOLTAGE REFERENCE SLOPE COMPENSATION RECOVERY TRACK/SS 1ms SOFT-START BCLAMP
LDO
BOOST
INTVCC
PVIN
VFB
+ + + -
ERROR AMPLIFIER
+ +
BURST COMPARATOR MAIN I-COMPARATOR
-
SYNC/MODE 0.54V
- + -
OSCILLATOR SLOPE COMPENSATION
SW
+ -
SW
SW OVER-CURRENT COMPARATOR
+
0.66V
+ -
PGND
-
LOGIC REVERSE COMPARATOR
PGOOD
+ -
PGND
PGND
RT
RUN
SYNC/MODE
3602 BD
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LTC3603 OPERATION
Main Control Loop The LTC3603 is a monolithic, constant-frequency, current mode step-down DC/DC converter. During normal operation, the internal top power switch (N-channel MOSFET) is turned on at the beginning of each clock cycle. Current in the inductor increases until the current comparator trips and turns off the top power MOSFET. The peak inductor current at which the current comparator shuts off the top power switch is controlled by the voltage on the ITH pin. The error amplifier adjusts the voltage on the ITH pin by comparing the feedback signal from a resistor divider on the VFB pin with an internal 0.6V reference. When the load current increases, it causes a reduction in the feedback voltage relative to the reference. The error amplifier raises the ITH voltage until the average inductor current matches the new load current. When the top power MOSFET shuts off, the synchronous power switch (N-channel MOSFET) turns on until either the bottom current limit is reached or the beginning of the next clock cycle. The bottom current limit is set at -2.5A for forced continuous mode and 0A for Burst Mode operation. The operating frequency is externally set by an external resistor connected between the RT pin and ground. The practical switching frequency can range from 300kHz to 3MHz. Overvoltage and undervoltage comparators will pull the PGOOD output low if the output voltage comes out of regulation by 10%. In an overvoltage condition, the top power MOSFET is turned off and the bottom power MOSFET is switched on until either the overvoltage condition clears or the bottom MOSFET's current limit is reached. Forced Continuous Mode Connecting the SYNC/MODE pin to INTVCC will disable Burst Mode operation and force continuous current operation. At light loads, forced continuous mode operation is less efficient than Burst Mode operation, but may be desirable in some applications where it is necessary to keep switching harmonics out of a signal band. The output voltage ripple is minimized in this mode. Burst Mode Operation Connecting the SYNC/MODE pin to a voltage in the range of 0.42V to 1V enables Burst Mode operation. In Burst Mode operation, the internal power MOSFETs operate intermittently at light loads. This increases efficiency by minimizing switching losses. During Burst Mode operation, the minimum peak inductor current is externally set by the voltage on the SYNC/MODE pin and the voltage on the ITH pin is monitored by the burst comparator to determine when sleep mode is enabled and disabled. When the average inductor current is greater than the load current, the voltage on the ITH pin drops. As the ITH voltage falls below 330mV, the burst comparator trips and enables sleep mode. During sleep mode, the top power MOSFET is held off and the ITH pin is disconnected from the output of the error amplifier. The majority of the internal circuitry is also turned off to reduce the quiescent current to 75A while the load current is solely supplied by the output capacitor. When the output voltage drops, the ITH pin is reconnected to the output of the error amplifier and the top power MOSFET along with all the internal circuitry is switched back on. This process repeats at a rate that is dependent on the load demand. Pulse-skipping operation is implemented by connecting the SYNC/MODE pin to ground. This forces the burst clamp level to be at 0V. As the load current decreases, the peak inductor current will be determined by the voltage on the ITH pin until the ITH voltage drops below 330mV. At this point, the peak inductor current is determined by the minimum on-time of the current comparator. If the load demand is less than the average of the minimum on-time inductor current, switching cycles will be skipped to keep the output voltage in regulation. Frequency Synchronization The internal oscillator of the LTC3603 can be synchronized to an external 5V clock connected to the SYNC/MODE pin. The frequency of the external clock can be in the range of 300kHz to 3MHz. For this application, the oscillator timing resistor should be chosen to correspond to a frequency that is 25% lower than the synchronization frequency. When synchronized, the LTC3603 will operate in pulseskipping mode.
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LTC3603 OPERATION
Dropout Operation When the input supply voltage decreases toward the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage forces the top switch to remain on for more than one cycle until it attempts to stay on continuously. In order to replenish the voltage on the floating BOOST supply capacitor, however, the top switch is forced off and the bottom switch is forced on for approximately 85ns every sixteen clock cycles. This achieves an effective duty cycle that can exceed 99%. The output voltage will then be primarily determined by the input voltage minus the voltage drop across the upper internal N-channel MOSFET and the inductor. Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant-frequency architectures by preventing subharmonic oscillations at duty cycles greater than 50%. It is accomplished internally by adding a compensating ramp to the inductor current signal at duty cycles in excess of 30%. Normally, the maximum inductor peak current is reduced when slope compensation is added. In the LTC3603, however, slope compensation recovery is implemented to reduce the variation of the maximum inductor peak current (and therefore the maximum available output current) over the range of duty cycles. Short-Circuit Protection When the output is shorted to ground, the inductor current decays very slowly during a single switching cycle. To prevent current runaway from occurring, a secondary current limit is imposed on the inductor current. If the inductor valley current increases to more than 4.5A, the top power MOSFET will be held off and switching cycles will be skipped until the inductor current is reduced. Overtemperature and PVIN Overvoltage Protection When using the LTC3603 in an application circuit, care must be taken not to exceed any of the ratings specified in the Absolute Maximum Ratings section. As an added safeguard, however, the LTC3603 does incorporate an overtemperature shutdown feature. If the junction temperature reaches approximately 150C, both power switches will be turned off and the SW node will become high impedance. After the part has cooled to below 115C, it will restart. Similarly, the LTC3603 contains an overvoltage shutdown feature that monitors the voltage on the PVIN pin. If this voltage exceeds approximately 16.5V, both power switches will be turned off until PVIN voltage is reduced below 16V. Voltage Tracking and Soft-Start Some microprocessors and DSP chips need two power supplies with different voltage levels. These systems often require voltage sequencing between the core power supply and the I/O power supply. Without proper sequencing, latch-up failure or excessive current draw may occur that could result in damage to the processor's I/O ports or the I/O ports of a supporting system device such as memory, an FPGA or a data converter. To ensure that the I/O loads are not driven until the core voltage is properly biased, tracking of the core supply and the I/O supply voltage is necessary. Voltage tracking is enabled by applying a ramp voltage to the TRACK/SS pin. When the voltage on the TRACK pin is below 0.6V, the feedback voltage will regulate to this tracking voltage. When the tracking voltage exceeds 0.6V, tracking is disabled and the feedback voltage will regulate to the internal reference voltage. The TRACK/SS pin is also used to implement an external soft-start function. A 1.2A current is sourced from this pin so that an external capacitor may be added to create a smooth ramp. If this ramp is slower than the internal 1ms soft-start, then the output voltage will track this ramp during start-up instead. Leave this pin floating to use the internal 1ms soft-start ramp. Do not tie the TRACK/SS pin to INTVCC or to PVIN.
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LTC3603 APPLICATIONS INFORMATION
The basic LTC3603 application circuit is shown on the front page of this data sheet. External component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by CIN and COUT. Operating Frequency Selection of the operating frequency is a trade-off between efficiency and component size. High frequency operation allows the use of smaller inductor and capacitor values. Operation at lower frequencies improves efficiency by reducing internal gate charge and switching losses but requires larger inductance values and/or capacitance to maintain low output ripple voltage. The operating frequency of the LTC3603 is determined by an external resistor that is connected between the RT pin and ground. The value of the resistor sets the ramp current that is used to charge and discharge an internal timing capacitor within the oscillator and can be calculated by using the following equation: R OSC = 1.15 * 1011 - 10k f(Hz) A reasonable starting point for selecting the ripple current is IL = 0.4(IMAX), where IMAX is the maximum output current. The largest ripple current occurs at the highest VIN. To guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation: V V L = OUT * 1- OUT fIL(MAX ) VIN(MAX ) The inductor value will also have an effect on Burst Mode operation. The transition from low current operation begins when the peak inductor current falls below a level set by the burst clamp. Lower inductor values result in higher ripple current which causes this to occur at lower load currents. This causes a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values will cause the burst frequency to increase. Inductor Core Selection Once the value for L is known, the type of inductor must be selected. High efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of the more expensive ferrite cores. Actual core loss is independent of core size for a fixed inductor value but it is very dependent on the inductance selected. As the inductance increases, core losses decrease. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates hard, which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Different core materials and shapes will change the size/current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate energy but generally cost more than powdered iron core inductors with similar
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Although frequencies as high as 3MHz are possible, the minimum on-time of the LTC3603 imposes a minimum limit on the operating duty cycle. The minimum on-time is typically 95ns. Therefore, the minimum duty cycle is equal to 100 * 95ns * f(Hz). Inductor Selection For a given input and output voltage, the inductor value and operating frequency determine the ripple current. The ripple current IL increases with higher VIN and decreases with higher inductance. V V IL = OUT * 1- OUT fL VIN Having a lower ripple current reduces the ESR losses in the output capacitors and the output voltage ripple. Highest efficiency operation is achieved at low frequency with small ripple current. This, however, requires a large inductor.
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LTC3603 APPLICATIONS INFORMATION
characteristics. The choice of which style inductor to use mainly depends on the price vs size requirements and any radiated field/EMI requirements. New designs for surface mount inductors are available from Coiltronics, Coilcraft, Toko and Sumida. CIN and COUT Selection The input capacitance, CIN, is needed to filter the trapezoidal current at the source of the top MOSFET. To prevent large ripple voltage, a low ESR input capacitor sized for the maximum RMS current should be used. RMS current is given by: IRMS = IOUT(MAX ) * VOUT * VIN VIN -1 VOUT density than other types. Tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long-term reliability. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coefficient and audible piezoelectric effects. The high Q of ceramic capacitors with trace inductance can also lead to significant ringing. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. Output Voltage Programming The output voltage is set by an external resistive divider according to the following equation: R2 VOUT = 0.6 V * 1+ R1 The resistive divider allows the VFB pin to sense a fraction of the output voltage as shown in Figure 1.
VOUT R2 VFB LTC3603 SGND
3603 F01
This formula has a maximum at VIN = 2VOUT , where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. The selection of COUT is determined by the effective series resistance (ESR) that is required to minimize voltage ripple and load step transients, as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. Loop stability can be checked by viewing the load transient response as described in a later section. The output ripple, VOUT , is determined by: 1 VOUT IL * ESR + 8 fCOUT The output ripple is highest at maximum input voltage since IL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Special polymer capacitors offer very low ESR but have lower capacitance
R1
Figure 1. Setting the Output Voltage
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LTC3603 APPLICATIONS INFORMATION
Burst Clamp Programming If the voltage on the SYNC/MODE pin is in the range of 0.42V to 1V, Burst Mode operation is enabled. During Burst Mode operation, the voltage on the SYNC/MODE pin determines the burst clamp level. This level sets the minimum peak inductor current, IBURST, for each switching cycle according to the following equation: IBURST V BURST = + 0.42V 6A / V VBURST is the voltage on the SYNC/MODE pin. IBURST can be programmed in the range of 0A to 3.5A, which corresponds to a VBURST range of 0.42V to 1V. As the output load current drops, the peak inductor current decreases to keep the output voltage in regulation. When the output load current demands a peak inductor current that is less than IBURST, the burst clamp will force the peak inductor current to remain equal to IBURST regardless of further reductions in the load current. Since the average inductor current is therefore greater than the output load current, the voltage on the ITH pin will decrease. When the ITH voltage drops to 330mV, sleep mode is enabled in which both power MOSFETs are shut off along with most of the circuitry to minimize power consumption. All circuitry is turned back on and the power MOSFETs begin switching again when the output voltage drops out of regulation. The value for IBURST is determined by the desired amount of output voltage ripple. As the value of IBURST increases, the sleep time between pulses and the output voltage ripple increases. The burst clamp voltage, VBURST, can be set by a resistor divider from the INTVCC pin. Alternatively, the SYNC/MODE pin may be tied directly to the VFB pin to set VBURST = 0.6V (IBURST = 1A), or through an additional divider resistor (R3) to set VBURST = 0.42V to 0.6V (see Figure 2).
R2 INTVCC LTC3603 SYNC/MODE R1 SGND SGND
3603 F02
Pulse skipping, which is a compromise between low output voltage ripple and efficiency, can be implemented by connecting the SYNC/MODE pin to ground. This sets IBURST to 0A. In this condition, the peak inductor current is limited by the minimum on-time of the current comparator and the lowest output voltage ripple is achieved while still operating discontinuously. During very light output loads, pulse skipping allows only a few switching cycles to be skipped while maintaining the output voltage in regulation. Frequency Synchronization The LTC3603's internal oscillator can be synchronized to an external 5V clock signal. During synchronization, the top MOSFET turn-on is locked to the falling edge of the external frequency source. The synchronization frequency range is 300kHz to 3MHz. Synchronization only occurs if the external frequency is greater than the frequency set by the RT resistor. Because slope compensation is generated by the oscillator's internal ramp, the external frequency should be set 25% higher than the frequency set by the RT resistor to ensure that adequate slope compensation is present. When synchronized, the LTC3603 will operate in pulse-skipping mode. INTVCC Regulator The LTC3603 features an integrated P-channel low dropout linear regulator (LDO) that supplies power to the INTVCC supply pin from the PVIN pin. This LDO supply has been designed to deliver up to 35mA of load current for the powering of the internal gate drivers and other internal circuitry. A small external load may also be applied provided that the total current from the INTVCC supply does not exceed 35mA. The INTVCC pin should be bypassed with no less than a 0.22F ceramic capacitor. A 1F ceramic capacitor is suitable for most applications. Topside MOSFET Driver Supply (BOOST Pin) The LTC3603 uses a bootstrapped supply to power the gate of the internal topside MOSFET (Figure 3). When the topside MOSFET is off and the SW pin is low, diode DBST charges capacitor CBST to the voltage on the INTVCC supply. In order to turn on the topside MOSFET, the voltage on the BOOST pin is then applied to its gate. As the topside MOSFET turns on, the SW pin rises to the PVIN voltage
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FB R2 LTC3603 SYNC/MODE R1
VOUT R3 (OPTIONAL)
VBURST = 0.42V TO 1V
VBURST = 0.42V TO 0.6V
Figure 2. Programing the Burst Clamp
12
LTC3603 APPLICATIONS INFORMATION
and the BOOST pin rises to PVIN + INTVCC, thereby keeping the MOSFET fully enhanced. For most applications, a 0.22F ceramic capacitor is appropriate for CBST. Schottky diode DBST should have a reverse breakdown voltage that is greater than PVIN(MAX).
INTVCC LTC3603 BOOST CBST SW
3603 F03
When the LTC3603 detects a fault condition (either undervoltage lockout or overtemperature), the TRACK/SS pin is quickly pulled to ground and the internal soft-start timer is also reset. This ensures an orderly restart when using an external soft-start capacitor. To implement tracking, a resistor divider is placed between an external supply (VX) and the TRACK/SS pin as shown in Figure 5a. This technique can be used to cause VOUT to ratiometrically track the VX supply (Figure 5b), according to the following: VOUT RTA RA + RB = * VX RA RTA + RTB For coincident tracking, as shown in Figure 5c, (VOUT = VX during start-up), RTA = RA, RTB = RB Note that the 1.2A current that is sourced from the TRACK/SS pin will cause a slight offset in the voltage seen on the TRACK/SS pin and consequently on the VOUT voltage during tracking. This VOUT offset due to the TRACK/SS current is given by: VOS,TRK = (1A) * RTARTA RA + RB * RTA + RTB RA
DBST CINTVCC
Figure 3. Topside MOSFET Supply
Run and Soft-Start/Tracking Functions The LTC3603 has a low power shutdown mode which is controlled by the RUN pin. Pulling the RUN pin below 0.7V puts the LTC3603 into a low quiescent current shutdown mode (IQ < 1A). When the RUN pin is greater than 0.7V, the controller is enabled. The RUN pin can be driven directly from logic as shown in Figure 4.
3.3V OR 5V LTC3603 RUN PVIN 4.7M LTC3603 RUN
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For most applications, this offset is small and has minimal effect on tracking performance. For improved tracking accuracy, reduce the parallel impedance of RTA and RTB.
VOUT VX VFB RTB LTC3603 TRACK/SS RTA
3603 F05a
Figure 4. RUN Pin Interfacing
Soft-start and tracking are implemented by limiting the effective reference voltage as seen by the error amplifier. Ramping up the effective reference into the error amp in turn causes a smooth and controlled ramp on the output voltage of the converter. To use the default, internal 1ms soft-start ramp, leave the TRACK/SS pin floating. Do not tie the TRACK/SS pin to INTVCC or to PVIN. To increase the soft-start time above 1ms, place a cap on the TRACK/SS pin. A 1.2A internal pull-up current will charge this capacitor, resulting in a soft-start ramp time given by: tSS = CSS * 0.6 V 1.2A
RB
RA
Figure 5a. Using the TRACK/SS Pin to Track VX
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13
LTC3603 APPLICATIONS INFORMATION
VX OUTPUT VOLTAGE
VOUT
TIME
Figure 5b. Ratiometric Tracking
VX OUTPUT VOLTAGE
supply. Each time the gate is switched from high to low to high again, a packet of charge, dQ, moves from INTVCC to ground. The resulting dQ/dt is the current out of INTVCC that is typically larger than the DC bias current. In continuous mode, the gate charge current can be approximated by IGATECHG = f(9.5nC). Since the INTVCC voltage is generated from VIN by a linear regulator, the current that is internally drawn from the INTVCC supply can be treated as VIN current for the purposes of efficiency considerations. Transition losses apply only to the internal topside MOSFET and become more prominent at higher input voltages. Transition losses can be estimated from: Transition Loss = (1.7) VIN2 * IO(MAX) * (120pF) * f 2. I2R losses are calculated from the resistances of the internal switches, RSW and external inductor RL. In continuous mode, the average output current flowing through inductor L is chopped between the main switch and the synchronous switch. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 - DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current: I2R Loss = IO2(RSW + RL) Other losses, including CIN and COUT ESR dissipative losses and inductor core losses, generally account for less than 2% of the total power loss. Thermal Considerations In most applications, the LTC3603 does not dissipate much heat due to its high efficiency. But, in applications where the LTC3603 is running at high ambient temperature with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum junction temperature of the part. If the junction temperature reaches approximately 150C, both power switches will be turned off and the SW node will become high impedance.
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VOUT
3603 F05b,c
TIME
Figure 5c. Coincident Tracking
Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% - (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses: VIN operating current and I2R losses. The VIN operating current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. 1. The VIN operating current comprises three components: The DC supply current as given in the electrical characteristics, the internal MOSFET gate charge currents and the internal topside MOSFET transition losses. The MOSFET gate charge current results from switching the gate capacitance of the internal power MOSFET switches. The gates of these switches are driven from the INTVCC
14
LTC3603 APPLICATIONS INFORMATION
To prevent the LTC3603 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by: TR = (PD) * (JA) where PD is the power dissipated by the regulator and JA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: TJ = TA + TR where TA is the ambient temperature. As an example, consider the LTC3603 in dropout at an input voltage of 8V, a load current of 2.5A and an ambient temperature of 70C. From the Typical Performance graph of Switch Resistance, the RDS(ON) of the top switch at 70C is approximately 85m. Therefore, power dissipated by the part is: PD = (ILOAD2)(RDS(ON)) = (2.5A)2(85m) = 0.53W For the MSOP package, the JA is 45C/W. Thus, the junction temperature of the regulator is: TJ = 70C + (0.53W)(45C/W) = 93.85C which is below the maximum junction temperature of 125C. Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ILOAD*(ESR), where ESR is the effective series resistance of COUT. ILOAD also begins to charge or discharge COUT, generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The ITH pin external components and output capacitor shown in the front page application will provide adequate compensation for most applications. Design Example As a design example, consider using the LTC3603 in an application with the following specifications: VIN = 12V, VOUT = 3.3V, IOUT(MAX) = 2.5A, IOUT(MIN) = 100mA, f = 1MHz. Because efficiency is important at both high and low load current, Burst Mode operation will be utilized. First, calculate the timing resistor: 1.15 * 1011 - 10k = 105k ROSC = 1MHz Next, calculate the inductor value for about 40% ripple current at maximum VIN: 3.3V 3.3V L= = 2.39H * 1- (1MHz )(1A ) 12V Using a 2.2H inductor results in a maximum ripple current of: 3.3V 3.3V IL = = 1.1A * 1- (1MHz )( 2.2H) 12V COUT will be selected based on the ESR that is required to satisfy the output voltage ripple requirement and the bulk capacitance needed for loop stability. In this application, a tantalum capacitor will be used to provide the bulk capacitance and a ceramic capacitor in parallel to lower the total effective ESR. For this design, a 100F ceramic capacitor will be used. CIN should be sized for a maximum current rating of: IRMS = 2.5A * 3.3V 12V * - 1 = 1.12ARMS 12V 3.3V
Decoupling the PVIN pin with a 22F ceramic capacitor is adequate for most applications. The output voltage can now be programmed by choosing the values of R1 and R2. Choose R1 = 105k and calculate R2 as: VOUT R2 = R1 - 1 = 472.5 k 0.6 V
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LTC3603 APPLICATIONS INFORMATION
CVCC 1F RPG 200k PGOOD ROSC 105k CITH 1nF RT RITH 4.32k ITH VFB R1 105k R2 475k CFB 10pF RUN TRACK/SS PGND LTC3603 SW SW SW PGND PGND COUT 100F L1 2.2H SYNC/MODE PGOOD INTVCC PVIN PVIN BOOST CBST 0.22F D1 VIN 12V CIN 22F
VOUT 3.3V 2.5A
L1: VISHAY IHLP2525CZER2R2MO1 CIN: TAIYO YUDEN TMK325BJ226MM-T COUT: TDK C3225X5ROJ107M
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Figure 6. 12V to 3.3V, 2.5A Regulator at 1MHz, Burst Mode Operation
Choose a standard value of R2 = 475k. The voltage on the MODE pin will be set to 0.6V by tying the MODE pin to the FB pin. This will set the burst current equal to approximately 1A. Figure 6 shows a complete schematic for this design example. How to Reduce SW Ringing As with any switching regulator, there will be voltage ringing on the SW node, especially for high input voltages. The ringing amplitude and duration is dependent on the switching speed (gate drive), layout (parasitic inductance) and MOSFET output capacitance. This ringing contributes to the overall EMI, noise and high frequency ripple. One way to reduce ringing is to optimize layout. A good layout minimizes parasitic inductance. Adding an RC snubber from SW to GND is also an effective way to reduce ringing. Finally, adding a resistor (10 to 100) in series with the BOOST pin will slow down the MOSFET turn-on slew rate and dampen ringing, but at the cost of reduced efficiency. Note that since the IC is buffered from high frequency transients by PCB and bondwire inductances, the ringing by itself is normally not a concern for reliability.
PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3603. Check the following in your layout: 1. A ground plane is recommended. If a ground plane layer is not used, the signal and power grounds should be segregated with all small-signal components returning to the SGND pin at one point which is then connected to the PGND pin close to the LTC3603. 2. Connect the (+) terminal of the input capacitor(s), CIN, as close as possible to the PVIN pin. This capacitor provides the AC current into the internal power MOSFETs. 3. Keep the switching node, SW, away from all sensitive small-signal nodes. 4. Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. You can connect the copper areas to any DC net (PVIN, INTVCC, VOUT, PGND, SGND, or any other DC rail in your system).
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LTC3603 TYPICAL APPLICATIONS
1.8V, 2.5A Regulator at 1MHz, Burst Mode Operation
VIN 12V CIN 22F
R3 845k
RPG 200k SYNC/MODE INTVCC PVIN PVIN RT RITH 4.32k ITH VFB LTC3603 SW SW SW PGND PGND BOOST D1
CVCC 1F
PGOOD R4 ROSC 137k 105k CITH 1nF
PGOOD
CBST 0.22F
R1 105k
L1 1H
RUN TRACK/SS
VOUT 1.8V 2.5A
CFB 10pF
R2 210k
PGND
COUT 100F 2
L1: VISHAY IHLP2525CZER1R0MO1 CIN: TAIYO YUDEN TMK325BJ226MM-T COUT: TAIYO YUDEN AMK316BJ107ML
3603 TA02
1.2V, 2.5A Regulator at 750kHz, Burst Mode Operation
VIN 12V R3 RPG 845k 200k SYNC/MODE PGOOD R4 137k CITH 1nF PGOOD ROSC 143k RT RITH 4.32k ITH VFB RUN TRACK/SS 10pF R2 105k PGND INTVCC PVIN PVIN BOOST CBST 0.22F LTC3603 SW SW SW PGND PGND COUT 100F 2 L1 1H D1 CVCC 1F CIN 22F
R1 105k
VOUT 1.2V 2.5A
L1: VISHAY IHLP2525CZER1ROMO1 CIN: TAIYO YUDEN TMK325BJ226MM-T COUT: TAIYO YUDEN AMK316BJ107ML
3603 TA03
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LTC3603 TYPICAL APPLICATIONS
Efficiency vs Load Current, 1.8V Regulator at 1MHz, Burst Mode Operation
100 95 VIN = 7.2V 90 EFFICIENCY (%) 85 80 75 70 65 60 0.001 0.1 1 0.01 LOAD CURRENT (A) 10
3603 TA04a
Efficiency vs Load Current, 1.2V Regulator at 750kHz, Burst Mode Operation
100 95 90 EFFICIENCY (%) 85 80 75 70 65 60 55 50 0.001 0.01 0.1 1 LOAD CURRENT (A) 10
3603 TA04b
VIN = 7.2V VIN = 12V
VIN = 12V
3.3V, 2.5A Regulator, Synchronized to 1.8MHz, Small Size
1.8MHz EXT. CLK CVCC 1F RPG 200k PGOOD ROSC 69.8k CITH 470pF RITH 2.94k RT SYNC/MODE PGOOD INTVCC PVIN PVIN BOOST CBST 0.22F ITH VFB R1 105k RUN TRACK/SS CFB 10pF R2 332k PGND LTC3603 SW SW SW PGND PGND COUT 47F L1 1H D1 VIN 12V CIN 22F
VOUT 2.5V 2.5A
L1: VISHAY IHLP2525CZER1ROMO1 CIN: TAIYO YUDEN TMK325BJ226MM-T COUT: MURATA GRM31CR60J476ME19
3603 TA05
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18
LTC3603 PACKAGE DESCRIPTION
MSE Package 16-Lead Plastic MSOP Exposed Die Pad ,
(Reference LTC DWG # 05-08-1667 Rev A)
BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 (.112 0.102 .004) 0.889 (.035
0.127 .005)
2.845 (.112 1
0.102 .004) 8 0.35 REF
5.23 (.206) MIN
1.651 (.065
0.102 3.20 - 3.45 .004) (.126 - .136)
1.651 (.065
0.102 .004)
0.12 REF
0.305 0.038 (.0120 .0015) TYP
0.50 (.0197) BSC
16 4.039 0.102 (.159 .004) (NOTE 3)
DETAIL "B" CORNER TAIL IS PART OF DETAIL "B" THE LEADFRAME FEATURE. FOR REFERENCE ONLY 9 NO MEASUREMENT PURPOSE
RECOMMENDED SOLDER PAD LAYOUT
16151413121110 9
0.280 0.076 (.011 .003) REF
0.254 (.010) GAUGE PLANE
DETAIL "A" 0 - 6 TYP 4.90 0.152 (.193 .006) 3.00 0.102 (.118 .004) (NOTE 4)
0.53 0.152 (.021 .006) DETAIL "A" 0.18 (.007) 12345678 1.10 (.043) MAX 0.86 (.034) REF
SEATING PLANE
NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.17 -0.27 (.007 - .011) TYP
0.50 (.0197) BSC
0.1016 (.004
0.0508 .002)
MSOP (MSE16) 0608 REV A
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LTC3603 PACKAGE DESCRIPTION
UF Package 20-Lead Plastic QFN (4mm x 4mm)
(Reference LTC DWG # 05-08-1710 Rev A)
0.70 0.05 4.50 0.05 3.10 0.05 2.00 REF 2.45 0.05 2.45 0.05
PACKAGE OUTLINE
0.25 0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 0.75 4.00 0.10 0.05 R = 0.05 TYP BOTTOM VIEW--EXPOSED PAD R = 0.115 TYP PIN 1 NOTCH R = 0.20 TYP OR 0.35 45 CHAMFER
19 20 0.40 1 0.10
PIN 1 TOP MARK (NOTE 6) 2.45 4.00 0.10 2.00 REF 2.45 0.10 0.10
2
(UF20) QFN 01-07 REV A
0.200 REF 0.00 - 0.05 NOTE: 1. DRAWING IS PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGD-1)--TO BE APPROVED 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
0.25
0.05
0.50 BSC
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LTC3603 REVISION HISTORY
REV A DATE 11/09 DESCRIPTION Changes to Absolute Maximum Ratings Changes to Pin Configuration Change to Electrical Characteristics Text Changes to Pin Functions Change to Block Diagram Text Changes to Operation Section Text Changes to Applications Information Section "How to Reduce SW Ringing" Section Added Additions to Related Parts PAGE NUMBER 2 2 3 6 7 8 10, 12, 15 16 22
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
21
LTC3603 RELATED PARTS
PART NUMBER LTC3601 LTC3605 LTC3609 LTC3612 LTC3412A LTC3413 LTC3414 LTC3415 LTC3416 LTC3418 LTC3602 LTC3608 LTC3610 LTC3611 DESCRIPTION 15V, 1.5A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 15V, 5A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 32V, 6A (IOUT), 1MHz, Synchronous Step-Down DC/DC Converter 6V, 3A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 3A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 3A (IOUT Sink/Source), 2MHz, Monolithic Synchronous Regulator for DDR/ QDR Memory Termination 4A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 7A (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converter 4A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter with Tracking 8A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 10V, 2.5A (IOUT), 3MHz, Synchronous Step-Down DC/DC Converter 18V, 8A (IOUT), 1MHz, Synchronous Step-Down DC/DC Converter 24V, 12A (IOUT), 1MHz, Synchronous Step-Down DC/DC Converter 32V, 10A (IOUT), 1MHz, Synchronous Step-Down DC/DC Converter COMMENTS 95% Efficiency, VIN: 4.5V to 15V, VOUT(MIN) = 0.6V, IQ = 300A, ISD < 14A, 3mm x 3mm QFN16, MSOP16E 95% Efficiency, VIN: 4V to 15V, VOUT(MIN) = 0.6V, IQ = 2mA, ISD < 15A, 4mm x 4mm QFN24 95% Efficiency, VIN: 4V to 32V, VOUT(MIN) = 0.6V, IQ = 900A, ISD < 15A, 7mm x 8mm QFN52 95% Efficiency, VIN: 2.25V to 5.5V, VOUT(MIN) = 0.6V, IQ = 70A, ISD < 1A, 3mm x 4mm QFN20, TSSOP20E 95% Efficiency, VIN: 2.25V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60A, ISD < 1A, TSSOP16E, 4mm x 4mm QFN16 90% Efficiency, VIN: 2.25V to 5.5V, VOUT(MIN) = VREF/2, IQ = 280A, ISD < 1A, TSSOP16E 95% Efficiency, VIN: 2.25V to 5.5V, VOUT(MIN) = 0.8V, IQ = 64A, ISD < 1A, TSSOP20E 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 450A, ISD < 1A, 5mm x 7mm QFN38 95% Efficiency, VIN: 2.25V to 5.5V, VOUT(MIN) = 0.8V, IQ = 64A, ISD < 1A, TSSOP20E 95% Efficiency, VIN: 2.25V to 5.5V, VOUT(MIN) = 0.8V, IQ = 380A, ISD < 1A, 5mm x 7mm QFN38 95% Efficiency, VIN: 4.5V to 10V, VOUT(MIN) = 0.6V, IQ = 75A, ISD < 1A, TSSOP16E, 4mm x 4mm QFN20 95% Efficiency, VIN: 4V to 18V, VOUT(MIN) = 0.6V, IQ = 900A, ISD < 15A, 5mm x 7mm QFN52 95% Efficiency, VIN: 4V to 24V, VOUT(MIN) = 0.6V, IQ = 900A, ISD < 15A, 9mm x 9mm QFN64 95% Efficiency, VIN: 4V to 32V, VOUT(MIN) = 0.6V, IQ = 900A, ISD < 15A, 9mm x 9mm QFN64
ThinSOT is a trademark of Linear Technology Corporation.
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22 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
LT 1209 REV A * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2009

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